Experienced Hardware Design Engineer

Requirements

• Ability to describe hardware designs at a high level, low level, or anywhere in between
• Brilliant design, optimization, debugging and problem solving skills
• Professional experience (2+ years) in RTL design for FPGA or ASIC
• Expert SystemVerilog development skills with a thorough understanding of the language
• Expert on low level FPGA or ASIC architectures, with a deep understanding of what makes them "tick"
• Skilled in network communications, processing pipelines, and/or machine learning
• Working knowledge of Python and/or C++
• Comfortable in a Linux environment
• Strong verification experience
• Familiarity with AMD Vivado is a plus
• Deep knowledge of SystemVerilog, FPGA internals and/or ASIC primitives, computer architecture, and vendor tool suites

About the role

Responsibilities

• Collaborate with a cross-functional team to develop and deploy custom FPGA and/or ASIC solutions for a wide range of trading applications
• Investigate new technologies and tools
• Contribute to a nimble hardware development tech stack
• architect and design complex systems on a highly collaborative global team
• identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL

What you'll get

• $200k–$300k base salary
• medical
• dental
• vision
• basic life insurance
• enrollment in our company’s retirement savings plans
• sick and parental leave
• other paid time off (including 20 vacation days and 10 paid holidays in the US)

Skills

SystemVerilog · RTL design · FPGA · ASIC · computer architecture · AMD Vivado · Python · C++ · Linux · network communications · processing pipelines · machine learning