Skip to content

Hardware Engineer (FPGA/ASIC)

Jane Street
🇺🇸New YorkStudentFull-timePosted July 10, 2026

About the Role

This is a summer internship where you'll work alongside full-time mentors on real-world hardware engineering projects at Jane Street. You'll gain hands-on experience with Hardcaml, an OCaml library for hardware design, and work on both FPGA and ASIC designs tailored to your background. The internship involves designing and validating hardware applications from concept to working design, using OCaml and Hardcaml for RTL design and testing. You'll dive deep on one project while gaining exposure to Jane Street's development environment and foundational systems that power the firm's operations.

Responsibilities

  • Summer internship in hardware engineering (FPGA/ASIC), May-August, in the NYC office

Requirements

  • Comfortable with a software programming language
  • Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
  • Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
  • Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
  • Interested in learning how to use FPGAs or ASICs in the context of networking

What You'll Get

  • Summer Internship